Elon Musk is not letting up on Tesla’s relentless pursuit of computational dominance. Just hours after confirming that the next-generation AI5 chip has officially finished its design phase, Musk took to X to share some eye-watering specs for its successor: AI6.
According to Musk, the AI6 chip will feature a massive performance leap, delivering a "true doubling of performance over AI5." This progress is particularly impressive considering a single AI5 chip is expected to offer five times as much raw compute power as current AI4 hardware (which features a dual-SoC design), despite it being a rush job. Musk admitted that the team "had to make several design concessions to move fast," even though they managed to finish the design 45 days ahead of schedule. Musk added that AI6 will address those early shortcuts while introducing "many new great ideas."
The Architectural Step-Change: AI6 and AI6.5
AI6 won’t just be an incremental bump; it represents a generational shift in how Tesla handles memory and processing. While Samsung was originally expected to be the sole producer after a massive $16 billion deal last year, Musk has also revealed a surprise "mid-cycle" refresh: AI6.5.
The standard AI6 chip will be manufactured using Samsung’s 2nm process at its new facility in Taylor, Texas. However, AI6.5 will see production shift to TSMC’s 2nm process in Arizona to further eke out performance. This dual-sourcing strategy suggests that Tesla is looking to leverage the slight technical advantages of different foundries to keep its lead. Both chips will transition to LPDDR6 memory, moving beyond the LPDDR5 (or LPDDR5X) expected in AI5, providing the massive bandwidth required for the next generation of neural networks.
The SRAM Secret Sauce
One of the most technical details shared by Musk involves how these chips handle data. Both AI6 and AI6.5 dedicate about half of their TRIP AI computation accelerators to SRAM, which is ultra-fast onboard memory.
This is a big deal because it allows the chip to perform complex AI calculations in a high-speed workspace without constantly waiting on the main system memory (DRAM). Musk noted that this design makes the effective memory bandwidth "an order of magnitude greater than DRAM bandwidth." Essentially, by keeping the most critical data right on the chip, Tesla is bypassing the hardware bottlenecks that currently plague the AI4 fleet.
From Cars to the TERAFAB
While Musk recently downplayed the need for AI5 in current consumer vehicles, claiming AI4 is enough for "better than human safety," the roadmap for AI6 is clearly looking toward the future of unsupervised autonomy. These chips will likely serve as the brain for the Cybercab and the Optimus humanoid robot once they reach high-volume production.
The development of these chips will likely also be supported by the jointly developed TERAFAB project between Tesla and xAI. This vertically integrated facility will consolidate chip design, memory production, and advanced packaging under one roof, allowing Tesla to iterate on a nine-month cycle. By the time AI6 enters mass production, Tesla’s "galactic civilization" goals might not seem so far-fetched.
